Interrupts
From Xen
The purpose of this page is to document how Xen sets up and uses interrupts. It is a work in progress, and to a certain extent dynamic as patches modify the code. However, the contents of it is accurate of November 14, 2011.
IDT vector entries
Refer to xen/include/asm-x86/mach-default/irq_vectors.h
Vector Ranges
| Section | Range | Use |
| Exceptions | 0x00 - 0x1f | Architecturally reserved |
| Dynamic IRQs | 0x20 - 0xdf | Free for assignment for devices |
| Legacy | 0xe0 - 0xef | Reserved range for PIC before switching to APIC |
| High Priority | 0xf0 - 0xff | For IPIs and serial interrupts |
Specific Vectors
| Vector | Symbol | Description |
0x20 | IRQ_MOVE_CLEANUP_VECTOR | Clean up references to IRQs in past PCPUs after they have been moved |
0x80 | LEGACY_SYSCALL_VECTOR
| |
0x82 | HYPERCALL_VECTOR
| |
0xf7 | CMCI_APIC_VECTOR
| |
0xf8 | PMU_APIC_VECTOR
| |
0xf9 | LOCAL_TIMER_VECTOR
| |
0xfa | THERMAL_APIC_VECTOR
| |
0xfb | CALL_FUNCTION_VECTOR
| |
0xfc | EVENT_CHECK_VECTOR
| |
0xfd | INVALIDATE_TLB_VECTOR
| |
0xfe | ERROR_APIC_VECTOR
| |
0xff | SPURIOUS_APIC_VECTOR
|

